Tapeouts

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Some of our recent tapeouts


Sagar Jan 2013 chip.png




Microprocessor, RAM, Emin detection and other experiments
Done mostly using Cadence SoC Encounter place and route tool
Tech: UMC 130nm RF-CMOS with 8-Metal & 1-poly process



KRV tapeout Jan 2013.png




Low power SRAM, Delay generator and other experiments
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Layout photo.jpeg
DiePhoto mod.png




2.4GHz RF Receiver with integrated PLL and ADC (3200umX1540um)
Tech: UMC 130nm RF-CMOS with 8-Metal & 1-poly process




Mani Jan 2013 chip.png
Mani TX.png




Chip contains PLL, PA, Period locked loop and substrate noise experiments
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Mani Aug 2011 chip.png
Mani Aug 2011 die.jpg




2.4 GHz PLL and PA
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Chip apr 2011.jpg
RF2011 DiePhoto colour.png




Low Power receiver (Zigbee) chain with ADC
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Chip jan 2011.jpg
Chip jan 2011 micrograph.jpg




A neural recording front end
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Chip layout 2009.jpeg
Diephoto 09.png




Low Power receiver front-end, neural LNA and PLL
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Chip rajath virtuoso.jpg
Micrograph rajath 2009.jpg




A low bandwidth time based ADC, LC VCO (2.4 GHz), Inductors and de-embedding structures
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Raghu 2008 chip.jpeg
Raghu 2008 die.jpeg




LNA-Mixer, a PLL and a Freq Multiplier block
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process




Kudva tapeout2006.jpeg




LNA-Mixer, Freq Multiplier block and other blocks
Tech: UMC 130nm CMOS with 8-Metal & 1-poly process