E0 284 Aug 2015

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Digital VLSI Design

Instructor: Bharadwaj Amrutur

Lecture Venue: ECE 1.08

Timings: M-W-F 12:10-1pm

Lab:

-Lab Exercise-1:E0 284 Aug 2015 Lab
-System Verilog Mini-Project: click here

References: (pdfs available here : intranet only)

-CMOS VLSI Design - A Circuists and Systems Perspective, 4th Edition, Weste/Harris

-Digital Integrated Circuits - A Design Perspective (2nd Edition), Jan Rabaey

-Verilog HDL, Samir Palnitkar

-System Verilog for Design, Stuart Sutherland

-SystemVerilog Event Regions, Race Avoidance & Coding Guidelines: click here

-System Verilog Overview:click here

-Synthesis How To

Lectures:

Lectures

Lecture 1: Introduction to Digital Design: slides

Lecture 2: Transistor Basics: slides / video

Lecture 3: DC Transfer Curve: slides / video

Lecture 4: Transistor Non idealities: slides / video

Lecture 5: Basics of Digital Design: slides / video

Lecture 6: Delay Basics: slides / video

Lecture 7: Logical Effort: slides / video

Lecture 8: Delay Minimization - I: slides / video

Lecture 9: Delay Minimization - II: slides / video

Lecture 11,12: Interconnect: slides / video

Lecture 13: Power Basics: slides / video

Lecture 14: Static Power: slides / video